Yue Li

Senior Postdoctoral Scholar
PARADISE Lab
Electrical Engineering
California Institute of Technology

Email: 
Office: 307 Moore Lab
Address: Caltech, MS 136-93, Pasadena, CA 91125

Photo: Yue Li

Research Interests

My research practices coding techniques in emerging memory systems. The objectives are to make data more robust to errors, storage devices live longer and operate faster. I'm particularly interested in removing practical barriers for emerging non-volatile memory technologies such as multi-level flash memories and phase-change memories. I appreciate the intrinsic beauty of coding theory, and have a strong belief in data-driven code design/redesign.

Education

Industry Experience

Visiting Positions

Recent Papers

  • E. En Gad, Y. Li, J. Kliewer, M. Langberg, A. Jiang, and J. Bruck. Asymmetric Error Correction and Flash-Memory Rewriting using Polar Codes. IEEE Transactions on Information Theory, 2016
  • Y. Li, D. Sheldon, A. Ramos, and J. Bruck. Error Characterization and Mitigation for 16nm MLC NAND Flash Memory under Total Ionizing Dose Effect. In IRPS'16: Proceedings of 54th IEEE International Reliability Physics Symposium, 2016. Note: also presented at 2016 Non-Volatile Memory Workshop.
  • Y. Li, E. En Gad, A. Jiang, and J. Bruck. Data Archiving in 1x-nm NAND Flash Memories: Enabling Long-Term Storage using Rank Modulation and Scrubbing. In IRPS'16: Proceedings of 54th IEEE International Reliability Physics Symposium, 2016.
  • F. Margaglia, G. Yadgar, E. Yaakobi, Y. Li, A. Schuster, and A. Brinkmann. The Devil is in the Details: Implementing Flash Page Reuse with WOM Codes. In FAST'16: Proceedings of 14th USENIX Conference on File and Storage Technology, 2016. Note: also presented at 2016 Non-Volatile Memory Workshop. Complete characterization results can be found in the tech report below.
  • G. Yadgar, A. Yucovich, H. Arobas, E. Yaakobi, Y. Li, F. Margaglia, A. Brinkmann and A. Schuster. Limitations on MLC Flash Page Reuse and its Effects on Durability. Technical Report CS-2016-02 , Computer Science Department, Technion, 2016.
  • Y. Ma, Y. Li, E. C. Kan, and J. Bruck. Reliability and Hardware Implementation of Rank Modulation Flash Memory. In NVMTS '15: Proceedings of IEEE Non-Volatile Memory Technology Symposium, 2015.
  • E. En Gad, W. Huang, Y. Li, and J. Bruck. Rewriting Flash Memory by Message Passing. In ISIT '15: Proceedings of IEEE International Symposium on Information Theory, 2015.
  • Y. Li, Y. Ma, E. En Gad, M. Kim, A. Jiang, and J. Bruck. Implementing Rank Modulation. In NVMW '15: Proceedings of Non-Volatile Memory Workshop, 2015.
  • A. Jiang, Y. Li, and J. Bruck. Error Correction through Language Processing. In ITW '15: Proceedings of Information Theory Workshop, 2015. Note: also presented at 2015 Non-Volatile Memory Workshop
  • Y. Li, H. Alhussien, E. F. Haratsch, and A. Jiang. A Study of Polar Codes for MLC NAND Flash Memories. In ICNC '15: Proceedings of International Conference on Computing, Networking and Communications, 2015. Note: invited paper.
  • Y. Li, A. Jiang, and J. Bruck. Error Correction and Partial Information Rewriting for Flash Memories. In ISIT '14: Proceedings of IEEE International Symposium on Information Theory, 2014. [slides]
  • E. En Gad, Y. Li, J. Kliewer, M. Langberg, A. Jiang, and J. Bruck. Polar Coding for Noisy Write-Once Memories. In ISIT '14: Proceedings of IEEE International Symposium on Information Theory, 2014.
  • Y. Li, H. Alhussien, E. F. Haratsch, and A. Jiang. The Performance of Polar Codes for Multi-level Flash Memories. In NVMW'14: Proceedings of Non-Volatile Memory Workshop, 2014. [slides]
  • A. Jiang, Y. Li, E. En Gad, M. Langberg and J. Bruck. Joint Rewriting and Error Correction in Write-Once Memories. In ISIT '13: Proceedings of IEEE International Symposium on Information Theory, 2013. Note: also presented in 2013 Information Theory and Application Workshop (invited), 2013 Flash Memory Summit, and to be presented at 2014 Non-Volatile Memory Workshop.
  • A. Jiang, Y. Li, and J. Bruck. Correcting Errors in MLCs with Bit-fixing Coding. In NVMW '13: Proceedings of Non-Volatile Memory Workshop, 2013. [slides]
  • Y. Li, Y. Wang, A. Jiang and J. Bruck. Content-assisted File Decoding for Nonvolatile Memories. In Asilomar '12: Proceedings of Asilomar Conference on Signals, Systems & Computers, 2012. Note: invited paper.
  • A. Jiang, Y. Li and J. Bruck. Bit-fixing Codes for Multi-level Cells. In ITW '12: Proceedings of IEEE Information Theory Workshop, 2012.
  • G. Dos Reis, D. Matthews and Y. Li. Retargeting OpenAxiom to Poly/ML: Towards an integrated proof assistant and computer algebra system. In Proceedings of CICM2011: the 18th Calculemus and 10th International Conference on Intelligent Computer Mathematics, 2011.
  • Y. Li and G. Dos Reis. An automatic parallelization framework for algebraic computation systems. In ISSAC '11: Proceedings of the 36th International Symposium on Symbolic and Algebraic Computation, 2011.
  • Y. Li and G. Dos Reis. An automatic parallelization framework for OpenAxiom. ACM Commun. Comput. Algebra 45, 2011.
  • Y. Li and G. Dos Reis. A quantitative study of reductions in algebraic libraries. In PASCO '10: Proceedings of the 4th International Workshop on Parallel and Symbolic Computation, 2010.

Patents

  • E. En Gad, W. Huang, Y. Li, and J. Bruck. Rewriting Flash Memory by Message Passing. US Provisional Patent Application Filed, 2015. US Non-Provisional Patent Application Filed, 2016.
  • Y. Li, E. En Gad, A. Jiang, and J. Bruck. Improving NAND Flash Reliability via Rank Modulation. US Provisional Patent Application Filed, 2014. US Non-Provisional Patent Application Filed, 2015.
  • Y. Li, H. Alhussien and E. F. Haratsch. Soft Decoding of Polar Codes. US Non-Provisional Patent US9317365, 2016.
  • Y. Li, A. Jiang, and J. Bruck. Error Correction and Partial Information Rewriting for Flash Memories. US Provisional Patent Application Filed, 2014.
  • E. En Gad, Y. Li, J. Kliewer, M. Langberg, A. Jiang, and J. Bruck. Asymmetric Error Correction and Flash-Memory Rewriting using Polar Codes. US Non-Provisional Patent Application Filed, 2015.
  • Y. Li, H. Alhussien, I. Djurdjevic, Y. Cai, E. F. Haratsch, and E. Cohen. Mitigating Write Errors in Multi Level Cell Flash Memory through Adaptive Error Correction Code Decoding. US Non-Provisional Patent US9319073, 2016.
  • Y. Li, H. Alhussien and E. F. Haratsch. Reduced Polar Codes. US Non-Provisional Patent US9007241 B2, 2013.
  • A. Jiang, Y. Li, E. En Gad, M. Langberg and J. Bruck. Joint Rewriting and Error Correction in Write-Once Memories. US Non-Provisional Patent Application Filed, 2013. Korean and Chinese Patent Applications Filed, 2015.
  • A. Jiang, Y. Li, E. En Gad, M. Langberg and J. Bruck. Polar Multicoding for Noisy Write-Once Memories. US Provisional Patent Application Filed, 2013.

Students

  • Constance Betsy Fu, SURF 2014.5 ~ 2014.9, Undergraduate Research 2014.10 - 2016.5, Caltech (co-mentored with Prof. Shuki Bruck).
  •    Undergraduate thesis: Extensions and Applications on the Remote Associates Test Solver.
  •    First employment: Blend Labs, San Francisco, CA.
  • Andre Ramos, SURF 2015, Caltech (co-mentored with Prof. Shuki Bruck).

Teaching

  • Caltech IST 4 (Guest Lecturer): Information and Logic (Spring 2014 [Slides], Spring 2015, Spring 2016).
  • TAMU CSCE 629 (TA): Analysis of Algorithms (Spring 2011, Fall 2010, Spring 2010, Fall 2009).
  • TAMU CSCE 411 (TA): Design and Analysis of Algorithms (Spring 2009, Fall 2008).
  • TAMU CSCE 222 (TA): Discrete Structure for Computing (Spring 2009).

Software/Data

  • NAND flash reliability data repository. (Now available upon request)
  • WordNet Manager: my own small class that provides WordNet API in C++. (Available upon request)
  • ECC++: C++ implementations of channel codes including BCH, LDPC and Polar codes. (Available upon request)
  • PCL Cloud Editor: a simple open-source 3D editor for the Point Cloud Library . [Git ] [SVN (read only archive)]
  • 3D Point Cloud Editor: a tool for visualizing and editing 3D point clouds. (Outdated, see PCL Cloud Editor for the latest update)
  • Reduction Parallelizer: a compiler static analysis tool for automatically parallelizing reductions in the Spad programs running on the OpenAxiom compuer algebra system. [SVN ]